← All guides

ADC Resolution Is Not Accuracy

"12-bit ADC" describes how finely the converter divides its input range. It says nothing about how close the result is to the true voltage. A 12-bit converter with a 1% reference is wrong by up to 41 counts at full scale, and one driven from a 100 kΩ divider may never settle to the right value at all. This guide separates the things that are usually lumped together, with numbers for each.

What resolution gives you

An N-bit converter splits the reference voltage into 2^N steps. One step is one LSB:

LSB = Vref / 2^N

Resolution	LSB at Vref = 3.3 V	LSB at Vref = 2.5 V	Ideal SNR
8 bit	12.89 mV	9.77 mV	49.9 dB
10 bit	3.22 mV	2.44 mV	62.0 dB
12 bit	0.806 mV	0.610 mV	74.0 dB
16 bit	0.050 mV	0.038 mV	98.1 dB

The SNR column is the best a perfect converter can do with a full-scale sine wave, limited only by quantisation: 6.02 × N + 1.76 dB. Real converters are worse, which leads to the next point.

Effective number of bits

Datasheets specify the measured signal-to-noise-and-distortion ratio, SINAD. Turning the ideal formula around gives the resolution the converter effectively delivers:

ENOB = (SINAD − 1.76) / 6.02

A converter with 12 output bits and a SINAD of 68 dB has an ENOB of 11.0. At 62 dB it has 10.0. The lowest one or two bits of the result are then mostly noise. This is normal for the ADCs built into microcontrollers, and it is the first number to look up before deciding how much resolution a design really has.

The reference usually dominates

The converter measures the input as a fraction of the reference. If the reference is off by some percentage, every reading is off by the same percentage. At full scale that is:

Reference error	Error at full scale, 10 bit	Error at full scale, 12 bit
0.1%	1 LSB	4 LSB
1%	10 LSB	41 LSB
2%	20 LSB	82 LSB

Using the supply rail as the reference is the common case, and a regulator's output tolerance is typically in the 1 to 2% range before load and temperature effects. That is tens of counts of gain error on a 12-bit result, far more than the converter's own errors.

There are two ways out. For an absolute measurement, such as a battery voltage, use a dedicated reference or measure the microcontroller's internal bandgap channel and correct for the real supply voltage. For a ratiometric measurement, such as a potentiometer or a bridge powered from the same rail as the reference, the reference error cancels: the sensor output and the reference move together, and the ratio stays the same. Whenever a sensor can be wired ratiometrically, that is cheaper and better than a precision reference.

Source impedance and sampling time

A successive-approximation ADC samples by connecting a small internal capacitor to the input for a fixed time. The capacitor charges through the source resistance plus the converter's internal switch resistance. If it has not charged to within half an LSB of the input voltage when the switch opens, the result is wrong, and no amount of averaging fixes it.

An RC circuit settles to within half an LSB of an N-bit converter after ln(2^N+1) time constants:

Resolution	Time constants needed
8 bit	6.2
10 bit	7.6
12 bit	9.0
16 bit	11.8

As a worked example, assume a sampling capacitor of 8 pF and ignore the internal switch resistance. Take the real values from your datasheet.

Source resistance	Time constant	Minimum sampling time, 12 bit
1 kΩ	8 ns	0.07 µs
10 kΩ	80 ns	0.72 µs
50 kΩ	400 ns	3.6 µs
100 kΩ	800 ns	7.2 µs

The source resistance of a voltage divider is its two resistors in parallel. A 100 kΩ / 100 kΩ divider, chosen to save battery current, looks like 50 kΩ to the ADC and needs several microseconds of sampling time. If the configured sampling time is shorter, readings come out low and depend on what the previous channel was, because the capacitor still holds part of the last sample. That channel-to-channel crosstalk is the typical symptom.

Three fixes, in order of preference: lengthen the sampling time in the ADC configuration; add a capacitor from the pin to ground, so the sampling capacitor is charged from a local reservoir instead of through the divider. To keep the charge-sharing dip under half an LSB it must be at least 2^N+1 times the sampling capacitor, which is 66 nF for 12 bits and 8 pF, so 100 nF in practice; or buffer the signal with an op-amp. The capacitor works for slowly changing signals only, since it forms a low-pass filter with the divider.

Oversampling: when it adds bits and when it does not

Averaging several samples reduces noise. Under the right conditions, taking four times as many samples and averaging them gains one bit of resolution:

Samples averaged	Extra bits
4	1
16	2
64	3
256	4

The conditions matter. The input must contain noise of about one LSB or more, and that noise must be random from sample to sample. If the signal is so quiet that every sample returns the same code, averaging returns the same code and nothing is gained. If the noise is not random, for example ripple from a switching regulator synchronised with the sampling, it does not average out.

Oversampling improves resolution and noise. It does not improve accuracy: reference error, offset, gain error and settling error pass through the average unchanged. It also divides the output rate by the number of samples averaged.

A short error budget

For a 12-bit converter at 3.3 V measuring a DC voltage near full scale, the pieces add up roughly like this:

Quantisation: ±0.5 LSB, about ±0.4 mV.
Converter noise and distortion at an ENOB of 10 to 11 bits: a few LSB.
Reference at 1%: up to 41 LSB, about 33 mV.
Incomplete settling from a high-impedance source: anything from nothing to hundreds of LSB.

The order of work follows from the list. Get the source impedance and sampling time right first, because that error is unbounded. Then deal with the reference. Only after both are under control is it worth thinking about noise, averaging, or a converter with more bits.

Run the numbers: ADC Resolution Calculator does this calculation for your own values.