Embedded Calculators & Part Finder

Size a value with 64 free calculators, then find the real component that fits — in stock, at the best price. For MCU, power, RF & firmware. No account.

📐
PWM / Timer
Frequency, period, duty cycle
📡
UART Baud Rate
Error rate, PASS/FAIL check
📊
ADC Resolution
LSB voltage, SNR, dynamic range
🐕
Watchdog Timer
STM32 IWDG & WWDG timeouts
🎛
I2C Timing
Bus timing & pull-up values
🚌
CAN Bus Bit Timing
STM32 bxCAN/FDCAN & MCP2515
🔌
SPI Timing
Bit period, frame, throughput
🔗
RS-485 Bus
Cable length, termination, bias
🚗
LIN Bus Timing
Bit, break, frame time
🏭
Modbus RTU Timing
Char & inter-frame gaps
🔁
Ring Buffer / DMA
Buffer sizing
🧩
Register Map → C
Bitfield struct & macros
🧾
CRC → C Code
Lookup table & function
⚙️
Stepper Motor
Steps/rev, microstep, pulse rate
🌀
BLDC / PMSM Speed
Motor electrical freq, pole pairs
🎯
Rotary Encoder
Motor encoder counts/rev
🔧
Motor Torque ↔ Power
N·m, RPM, Watts, hp
🔥
MOSFET Power Loss
Conduction & switching loss
🧲
Transformer Turns
Ratio, Ns, current ratio
🔋
LDO Dropout / Power
Heat dissipation & efficiency
🎵
I2S Audio Clock
BCLK, LRCLK, bit period
USB Data Lines
Bit time, 90Ω, termination
🌐
Ethernet Cable
Bit time, delay, 100m limit
🔲
Bit Field Visualizer
32-bit register breakdown
🔢
Q-Format Converter
Float ↔ fixed-point
🧮
Number Base Converter
Dec, Hex, Bin, Oct converter
🔢
IEEE 754 Visualizer
32-bit Float & 64-bit Double
🔄
Endian Swap
Big/Little/Mid-Endian byte swap
📦
Struct Alignment
C struct padding & visualizer
💾
Memory & Transmission
Bytes, baud rate & sample times
🔠
Glyph Mapper
7-Segment & Character LCD custom font generator
💎
Crystal Load Cap
Oscillator load capacitor sizing
Ohm's Law
V, I, R, P — any 2 → all 4
Voltage Divider
Vout, loaded divider, Thevenin
💡
LED Resistor
Series/parallel configs & E24
🎨
Resistor Code
Color bands & SMD decoder
🔺
Op-Amp Gain
Amp configurations & Schmitt
📐
Instrumentation Amp
3-op-amp in-amp gain & Vout
🔻
Op-Amp Resistor
Inverting/Non-inv → R2,R3,R4
🔀
BJT Bias CE
Q-point & stability factor
NE555 Timer
Astable / monostable
🔋
Capacitor Charge
RC time constant, τ milestones
📉
Buck / Boost
Switching regulator design
🔌
AWG Wire Gauge
Wire gauge & voltage drop
🧮
Series / Parallel
R · C · L equivalent value
🔋
LM317 Regulator
Adjustable Vout & R2 solver
Current Divider
Branch currents in parallel R
LC Resonance
LCR resonant freq, Q-factor
RC Filter
Cutoff frequency, gain & phase
🔊
dB Converter
dB, dBm & mW bidirectional
🔄
CRC Calculator
CRC-8/16/32, 7 polynomials
🔄
Checksum / CRC
XOR, Sum8/16, LRC, CRC
🛣️
PCB Trace Calc
IPC impedance & trace width
🎚
Active Filter
Sallen-Key 2nd-order LPF/HPF
📡
RF Trans. Line
Microstrip impedance (IPC-2141)
📶
VSWR / Return Loss
Γ, return & mismatch loss
🛰️
RF Link Budget
FSPL, Rx power, margin
〰️
Wavelength / Antenna
λ, λ/2 dipole, λ/4 whip
📶
Attenuator Pad
T / Pi resistor values (dB)
🌀
Coil Inductance
Air-core solenoid (Wheeler)
🔋
Battery Life
Estimated system run-time
🌡
Temperature
Units & RTD sensor temps
🌉
Wheatstone Bridge
Bridge Vout & balance
🔥
Junction Temp
Thermal Tj & max power
🔁

Ring Buffer / DMA Sizing Calculator

Minimum buffer size to absorb data between service intervals.

Input
ℹ Buffer must hold the data arriving while the CPU is busy elsewhere.
Results
Required Bytes
Next Power of 2
Fill Time at Throughput
💡 Usage & Formula

bytes = throughput × latency × safety. Power-of-2 size lets DMA wrap with a cheap mask.

When you need it: Sizing a circular buffer for UART or ADC DMA so it never overruns between the intervals when your code drains it, and picking a power-of-two length for cheap wraparound.

Worked example: A UART at 115200 bps (~11.5 KB/s) serviced every 10 ms must hold at least 0.010 × 11520 ≈ 115 bytes per interval; round up to 256 for margin. Fill level is (head − tail) & (size − 1).

Tips & gotchas:

  • A power-of-two size lets you wrap with & (N−1) instead of an expensive modulo.
  • Keep one slot empty (or a separate count) so you can tell "full" from "empty" — both otherwise show head == tail.
  • Single-producer/single-consumer is lock-free if head and tail are word-aligned volatile and updated last.
  • Size for the worst-case service latency (ISR blocked, higher-priority task), not the average.