I2C Timing & Pull-Up Resistor
Calculate bus timing requirements, pull-up resistor limits, and I2C peripheral timing register values.
I2C (Inter-Integrated Circuit) uses open-drain lines requiring pull-up resistors to pull the bus high when devices release the lines.
Formulas:
- Rp (min):
(Vdd - Vol) / Iol - Rp (max):
Rise_Time / (0.8473 * Cb)
Usage: Select the speed mode (e.g., Standard or Fast Mode) and input your bus voltage and total bus capacitance to calculate the valid range for pull-up resistors and I2C timing register values.
When you need it: Sizing I2C pull-up resistors so the rising edge meets the bus spec at your total capacitance, or fixing rounded-off edges and NACKs on a long or heavily loaded bus.
Worked example: 400 kHz Fast-mode with 200 pF of bus capacitance and a 300 ns rise-time limit gives Rp_max = tr / (0.8473 × C) = 300e-9 / (0.8473 × 200e-12) ≈ 1.77 kΩ. The sink-current floor is Rp_min = (Vdd − 0.4) / 3mA = (3.3 − 0.4) / 3e-3 ≈ 0.97 kΩ, so ~1.5 kΩ sits safely in between.
Tips & gotchas:
- Every extra device and centimetre of trace adds capacitance, which forces a smaller pull-up to keep the rise time in spec.
- Too-small a pull-up violates the 3 mA (Fast-mode) sink limit and the low-level output voltage; too large slows the edges into NACK territory.
- Standard-mode (100 kHz) allows a 1000 ns rise time, so it tolerates much larger pull-ups on the same bus.
- For very long buses use a bus buffer/accelerator (e.g. active pull-up) rather than fighting RC with ever-smaller resistors.